Test Data Out (TDO)

The Limitations of Boundary Scan on ICT

Many legacy In-Circuit Testers (ICT) support some kind of boundary scan for structural testing, to address limited access issues. But are these as good as advertised?

Pollution, Power Margins, and SerDes Problems

In addition to board design/layout issues, manufacturing defects and variances, other factors such as pollution and power marginalities can affect a design’s signal integrity and subsequent performance.

Flying Probe Testers and Boundary Scan

Today’s flying probe testers can give high structural test coverage, making them ideal for prototype board bring-up and low-volume manufacturing. But they can be darned slow. Can boundary scan help?

End the flash programming merry-go-round

In today’s market we have a choice of different types of flash memory devices – or, many of us might say, we have different devices that we can flash. We have NOR and NAND and then there is SPI. Each platform we adopt as a reference design to take advantage of some new hot processor also recommends what tool we should use for programming its flash. And, of course, it’s not a programmer in your arsenal of tools. So off you run to get Yet-Another-Programmer (YAP).

PCI Express Loopback and PCI-SIG

One of several buses I’ve been working on with the ScanWorks High-Speed I/O (HSIO) products is PCI Express (PCIe). We’ve had tools in ScanWorks to test PCIe in various ways since the Intel server chipset code named Twincastle back in the 2005 timeframe. And we’ve often run into issues with having robust enough support to handle any random endpoint that customers might choose for their system. 

Increasing densities and shrinking form factors

Isn’t it a great time to be a board designer? Compared to twelve years ago, the average number of nets has gone from 1,544 to 2,832; the number of pin-to-pin connections has increased from 7,661 to 13,573; the number of components has grown from 1,120 to 3,518; and many other challenges to the job have arisen.

Why use boundary-scan to program flash memory?

I interact with users of ScanWorks boundary-scan test (BST) tools quite frequently and one issue that comes up often is the topic of in-system NOR and NAND flash programming with boundary scan.

When Gigabit Ethernet isn't fast enough

My neighbor’s son ripped out all the Cat 5e cable in his house and replaced it with Cat 6 cable. Why did he do that?

What is Board Bring-Up, and why does it take so long?

Board bring-up is a phased process whereby an electronics system, inclusive of assembly, hardware, firmware, and software elements, is successively tested, validated and debugged, iteratively, in order to achieve readiness for manufacture. This process can take so long that, sometimes, a product never gets to market because it is succeeded by the next generation.

High-Speed I/O Design Guidelines

I was reading a Design Guidelines document recently that nicely summarized what to watch out for when designing circuits with high-speed I/O. There are so many things that can go wrong, so careful design and accurate measurements are essential.